Upgrading Battery Modules with RS485 Cable - without a Skybox

Unlike Ethernet standards like TCP that repeatedly transmit packets until acknowledged (error correction), RS-485 signals transmit without requiring confirmation. Each device on an individual RS-485 link must communicate at an identical baud rate. The dual communications channels also provide an easy way to link systems that communicate using different serial protocols. The communications is asynchronous because no synchronizing clock signal is transmitted along with the data. The /SS (active-low slave select) signal enables data transfers by slave devices when it is active low. When the communication is complete the slave silences its transmitter so that the master can talk to a different slave on the network. When the network master wants to talk to this particular slave, it outputs the slave’s ascii name onto the serial bus. Any required SPI output signals must be configured as outputs by setting the appropriate bits in the Port D data direction register which is named PORTD.DIRECTION in the QED-Forth kernel. The /SS pin can be configured as either an input or an output. If the 68HC11 is initialized as a master by setting the MSTR bit, then bit 5 of the Port D data direction register (PORTD.DIRECTION) determines whether /SS is an input or an output.

If the /SS input to a slave is inactive (high), the slave ignores the SCK input, does not transmit or receive data, and keeps its MISO output in a high-impedance state so that it does not interfere with the SPI bus. Regardless of the network, however, there are only four signals used: SCK provides a synchronized clock, MOSI and MISO signals are used for data transmission and reception, and /SS configures the 68HC11 as a master or slave device. Hardware is interfaced to the SPI via four PORTD pins named /SS, SCK, MOSI, and MISO brought out to pins 11 through 14 on the Digital I/O connector (see Appendix A). Serial 2 is implemented by a software UART in the controller’s QED-Forth Kernel that uses two of the processor’s PortA I/O pins to generate a serial communications channel. The Serial 1 port can be configured for either RS232 or RS485 communications at up to 19200 baud. There are several protocols that govern the format of exchanged data, with the RS232 protocol used primarily by personal computers, and the RS485 protocol used in industrial control systems. It is supported by virtually all personal computers, and is the default protocol for both of the QScreen Controller’s serial ports.

Thus, the master 68HC11 has only one input, MISO, which is the slave QVGA Controller’s only output. Setting the MSTR bit initializes the 68HC11 as a master, what is rs485 cable and clearing the MSTR bit initializes it as a slave. Initializing the 68HC11 as a slave (by clearing the MSTR bit in the SPCR control register as explained below) automatically configures the /SS pin as an input. Clearing the MSTR bit in the SPCR control register automatically configures the /SS (slave select) pin as an input. The RS485 communication interface allows the slave unit (i.e. control module) to be interrogated and some options programmed by a remote computer. The SPI control register, SPCR, contains 8 bits which must be initialized for proper control of the QVGA Controller’s SPI (M68HC11 Reference Manual, p.8-7). A mode fault occurs when the SPI senses that a multimaster conflict (MC68HC11F1 Technical Data Manual, p.10-5) exists on the network as explained above in connection with the /SS input. It is important to note that when the CPHA bit is 0, the /SS line must be de-asserted and re-asserted between each successive data byte exchange (M68HC11 Reference Manual, p.8-3).

If bit 5 of DDRD is 1, then /SS is a general purpose output that operates independently of the SPI. If the 68HC11 is initialized as a master (by setting the MSTR bit in the SPCR control register as explained below) then bit 5 of the Port D data direction register (DDRD) determines whether /SS is an input or an output. Also, in the diagram, the master QVGA Controller’s /SS (slave select) is configured as an output. If the /SS input to a slave is active (low), the slave transfers data in response to the SCK clock input that is initiated by the master. This allows the processor that is master to control the input /SS pins of other CPU’s, for example. The QScreen Controller combines an embedded computer based on the 68HC11 microcontroller with a touch panel and LCD (liquid crystal display) graphic user interface (GUI) that is ideal for instrument control and automation. If your computer does not have an RS-232 serial port, low cost USB-to-RS-232 serial cables are available; contact Mosaic Industries for details. Chassis and signal grounds are connected together to the digital ground (GND) signal. The RS232 protocol specifies the use of two separate grounds, a signal ground and a protective (or "chassis") ground.